Difference between revisions of "To Do List"
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=== With Detector Head from LBL === | === With Detector Head from LBL === | ||
1. Pump down Detector | |||
2. Wire up Thermocouples so I can monitor internal temperature | |||
3. Install Immersion chiller probe on detector head. | 3. Install Immersion chiller probe on detector head. | ||
Special Tools are on hand now. | Special Tools are on hand now. |
Revision as of 21:48, 17 January 2013
TO DO
With Detector Head from LBL
1. Pump down Detector
2. Wire up Thermocouples so I can monitor internal temperature
3. Install Immersion chiller probe on detector head.
Special Tools are on hand now.
4. Wire up equipment protection interlock and test it out
This prevents the detector from overheating and prevents the chiller from turning on if there is no vacuum
5. Put a vacuum on the detector, cool it down, power it up, take some dark images.
Verify that dark images vary with different exposure times. Verify that the noise is at the expected level.
6. Take some optical images.
Generate a photon transfer curve.
7. Work on solving miscellaneous problems with LBNL
Optimize configuration parameters
8. Software development
Area detector, data reduction, user interface.....
9. Take some Fe and other source images
Will also be used to optimize configuration parameters
10. Test at the Optics/Detector Beam line
Maybe able to take some flat field measurments?
11. Install at Beam Lines
CIN Modules
- LBNL to fill in?
Top Module
- LBNL to fill in
Digitizer Module
- LBNL to fill in
Chiller
- Need to install into detector heads
GUI
- Add fCRIC mask to GUI
- Keep consolidating redundant routines
COMPLETED TASK
With Detector Head from LBNL
1. Ring out untested power cable to clock module.
The power goes through vacuum cables that are part of the detector head. The plan is to open up the detector head and remove the vacuum cables. I can then use extra vacuum feed through connectors to test all of the cables to the clock module.
2. Power spare clock module with power cables and test communications with Computer Interface Node (CIN) in ATCA.
This will verify that CIN is working and test all of the clock module cables without endangering the detector.
Vacuum Chambers
- APS has two vacuum chambers built
Chiller System
- APS has two Systems
GUI
- Put under CVS control
- Added image viewer
- Added Expousre controls
- Add fCRIC Timing waveforms
- Sync/Update Exposure control when other data is sent down
- One button to send file to FPGA and update GUI
- Currenly when you send down a configuration file it does not update the GUI's waveforms, and bias windows, unless you are in the the waveform or bias window.
ATCA Shelves
- Arrived from
- Linux installed
- Lots of software installed
- Raid array mounted and tested using 10Gbit Links
Clock Module
- 8-1-2012 Shipped 12 tested Clock Modules to LBL
Need to fully build 12 Clock Modules, LBNL will provide metal plates (3 per module) Order 2 blank PCB
- 4-2-2012 PCBs ordered (15 days)
- 4-3-2012 Assembly ordered
Power Supply
- 12-20-2012 Added connector on back for interlock system. When open power supply turns off.